There are a number of known techniques for calculating the modulus of a number with respect to another number in hardware logic (e.g. for calculating y=a mod b, where a and b are integers and y is the remainder of the division a/b). Such hardware logic may form part of a processor such as a central processing unit (CPU) or graphics processing unit (GPU). One example method calculates the modulus as a by-product of an iterative division implementation (e.g. an iterative division which calculates a/b). However, where the value of ‘b’ is constant, it may be possible instead to use lookup tables and multiplexers (e.g. where a is not too large). Given the binary nature of most computer mathematics, calculations where the constant b is a power of two are trivial to perform and further, where b is a multiple of a power of 2, the calculation can be simplified by first performing the trivial division and modulus of the power of 2 factor and then recombining subsequently. The operation of calculating the modulus of a number with respect to a constant may be referred to as modulo (or modulus) calculation or the modulo operation.
The embodiments described below are provided by way of example only and are not limiting of implementations which solve any or all of the disadvantages of known methods of implementing modulo calculation in hardware logic.